DARPA searching for secure computer processors based on the x86 architecture

The Defense Advanced Research Projects Agency is seeking information on using secure processors based on the x86 architecture, the agency announced.

DARPA is interested in protecting x86 processors against seven categories of common weaknesses: buffer errors; permissions, privileges and access; resource management; injection; information leakage; hardware/system on a chip implementation errors; numeric errors. 

DARPA is also interested in other security concerns that can be addressed outside of those seven categories, according to the announcement.

The goal of this Request for Information is to explore the feasibility of developing capabilities similar to the System Security Integrated Through Hardware and Firmware (SSITH) program for a secure x86 processor by gathering new concepts that have a significant chance of achieving the below listed goals:

• Endow legacy software with modern safety

• Preserve x86 compatibility

• Minimize power and performance impact

DARPA’s SSITH program developed novel hardware defenses that can thwart the most common software exploitations of hardware vulnerabilities. 

SSITH has successfully implemented approaches to mitigate hardware vulnerabilities through techniques such as parallel pipelines, tagging, encryption, enclaves, context sensitive decoding and machine learning. 

Securing the x86 architecture is the next step in ensuring the vast majority of computing systems that are vital to national security.

The x86 complex instruction set computer is one of the most widely used and complex ISAs. Over a six-decade span, it has been extended from 16 to 32 to 64 bits, has byte granular, variable word sizes, thousands of variable width instructions, and supports generations of software investment underlying a vast critical infrastructure. These challenges specific to x86 architecture go beyond what has been already achieved in the SSITH program and may require extensions or new techniques to be developed to handle the unique aspects of the x86 architecture.

Responses to the RFI are welcome from all sources including private or public companies, individuals, universities, university-affiliated research centers, not-for-profit research institutions, and U.S. Government-sponsored labs. 

To submit a proposal and learn more about the RFI read the announcement HERE